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Module
UART
USART
Reflex Input
CC2 Input
DTI Fault Source 0 (TIMER0 only)
DTI Fault Source 1 (TIMER0 only)
DTI Input (TIMER0 only)
TX/RX Enable
TX/RX Enable
Input Format
Pulse/Level
Pulse
Pulse
Pulse/Level
Pulse
Pulse
IrDA Encoder Input (USART0 only) Level
13.3.4 Example
The example below (illustrated in Figure 13.2 (p. 129) ) shows how to set up ADC0 to start single
conversions every time TIMER0 overflows (one HFPERCLK cycle high pulse), using PRS channel 5:
?
?
?
?
Set SOURCESEL in PRS_CH5_CTRL to 0b011100 to select TIMER0 as input to PRS channel 5.
Set SIGSEL in PRS_CH5_CTRL to 0b001 to select the overflow signal (from TIMER0).
Configure ADC0 with the desired conversion set-up.
Set SINGLEPRSEN in ADC0_SINGLECTRL to 1 to enable single conversions to be started by a high
PRS input signal.
? Set SINGLEPRSSEL in ADC0_SINGLECTRL to 0x5 to select PRS channel 5 as input to start the
single conversion.
? Start TIMER0 with the desired TOP value, an overflow PRS signal is output automatically on overflow.
Note that the ADC results needs to be fetched either by the CPU or DMA.
Figure 13.2. TIMER0 overflow starting ADC0 single conversions through PRS channel 5.
ch0
ch1
ch2
TIMER0
Overflow
ADC0
Start single conv.
PRS
ch3
ch4
ch5
ch6
ch7
2011-04-12 - d0001_Rev1.10
129
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